System and method for measuring on-chip supply noise

ABSTRACT

A method and system for measuring noise of an on-chip power supply. In an embodiment, the system comprises a delay line that receives as an input a signal such as a square wave. The delay line may comprise a series of inverters connected to the power supply. The output of the delay line may combine the input signal and the noise signal from the power supply to produce a series of delayed versions of the input signal. Analysis of the output signal yields characteristics associated with the noise signal of the power supply such as its spectrum. In another embodiment, the system may comprise at least one mixer that modulates an input signal, such as a sinusoid, with the noise signal of the power supply. Demodulating the mixed signal then yields the noise signal of the power supply for further analysis.

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BACKGROUND OF THE INVENTION

Circuits built on chips, generally have on-chip power supplies. On-chippower supplies generate noise, to which circuits coupled thereto aresomewhat sensitive. Some components can be greatly affected by the powersupply noise, such components as phase-locked loops (PLLs), for which itis pertinent to know whether the supply noise has any spectrum. Forexample, if a power supply has noise that causes oscillation at 10 kHz,and that power supply feeds a PLL that is trying to put out a 1 MHzsignal from some source, the 10 kHz power supply noise will end upmodulated on-top of the 1 MHz output. As a result the output of thePLL-Will contain jitter. This jitter may cause circuits relying on theaccuracy of a clean signal from the PLL to malfunction.

There is an interest in knowing how a circuit is really performing, butwith the power supply noise affecting the performance of the circuit,the real performance of the circuit is often difficult to determine. Itis especially difficult to probe the power supply inside the chip, sodetermining the level and spectrum of the power supply has provendifficult.

In measuring the noise of the power supply, measuring the DC componentof the noise is simple, and can be done by measuring the voltageassociated with the noise of the power supply. More difficult, however,is determining the high frequency content of the noise signal of thepower supply, and hence its spectrum independent of the effects of othercomponents of the circuit.

Existing solutions simply output the power supply pins for externalmeasurements. The problem with such an approach is that the power supplyis often disrupted by external equipment, board layout, and packageconcerns. Therefore, it is difficult to determine the on-chip noiselevel, and measure the noise without affecting the noise itself. Evenmore difficult is measuring high frequency noise caused by the powersupply that can occur on the chip.

Further limitations and disadvantages of conventional and traditionalapproaches will become apparent to one of skill in the art, throughcomparison of such systems with some aspects of the present invention asset forth in the remainder of the present application with reference tothe drawings.

BRIEF SUMMARY OF THE INVENTION

A system and/or method is provided for measuring on-chip supply noise,substantially as shown in and/or described in connection with at leastone of the figures, as set forth more completely in the claims.

These and other features and advantages of the present invention may beappreciated from a review of the following detailed description of thepresent invention, along with the accompanying figures in which likereference numerals refer to like parts throughout.

BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS

FIG. 1 a illustrates a block diagram of an exemplary power supply noisemeasuring circuit, in accordance with an embodiment of the presentinvention.

FIG. 1 b illustrates a block diagram of an exemplary power supplynoise-measuring module of FIG. 1 a, for example, in accordance with anembodiment of the present invention.

FIG. 2 illustrates a plot of an exemplary input and output of the powersupply noise measuring circuit, in accordance with an embodiment of thepresent invention.

FIG. 3 illustrates an exemplary frequency representation of an outputsignal, in accordance with an embodiment of the present invention.

FIG. 4 illustrates a block diagram of another exemplary power supplynoise measuring circuit, in accordance with an embodiment of the presentinvention.

FIG. 5 illustrates a plot of another exemplary input and output of thepower supply noise measuring circuit, in accordance with an embodimentof the present invention.

FIG. 6 illustrates a flow chart of an exemplary method of on-chip powersupply noise measurement, in accordance with an embodiment of thepresent invention.

FIG. 7 illustrates a flow chart of another exemplary method of on-chippower supply noise measurement, in accordance with an embodiment of thepresent invention.

DETAILED DESCRIPTION OF THE INVENTION

Certain embodiments of the present invention relate to measurementsassociated with circuits and on-chip signals. More specifically, certainembodiments of the present invention related to a system and method formeasuring on-chip supply noise. An embodiment of the present inventionmay comprise a box that may be connected to a power supply on a chip.The box may give an indication of the power supply noise, or a signalindicating a measure of the power supply noise.

FIG. 1 a illustrates a block diagram of an exemplary system formeasuring power supply noise on a chip 103. The chip 103 may comprise anon-chip power supply 104 and an on-chip noise measurement module 106.The on-chip noise measurement module 106 may comprise circuitry 107,input ports 105 and 110, and an output port 115. The input port 105 maycouple the on-chip power supply 104 to the circuitry 107 within theon-chip noise measurement module 106.

FIG. 1 b illustrates a block diagram of the exemplary power supplynoise-measuring module 106 of FIG. 1 a, for example, in accordance withan embodiment of the present invention. The power supply noise-measuringmodule may comprise an input port 110, a delay line 125, and an outputport 115. The input port 110 may be coupled to a pin on the chip 103,and the output port 115 may be coupled to a pin on the chip 103. Tominimize pin usage on the chip 103, the input port 110 and the outputport 115 may be coupled to general-purpose pins on the chip 103 ratherthan dedicated pins. The circuit-may be also connected to a ground 120.The delay line 125 may be connected to the on-chip power supply 104 ofthe on-chip power supply for which noise on the output needs to bemeasured. In exemplary embodiments of the present invention, the powersupply 104 may be an analog supply or a timing-critical power supply.

In an embodiment of the present invention, the delay line 125 maycomprise a plurality of serially coupled inverters 130, where all theinverters may be powered by the same on-chip power supply 104. The delaythrough the inverters 130 may depend on the voltage of the on-chip powersupply 104. To isolate the noise of the power supply 104, the input port110 and the output port 115 drivers may be stable supplies such thatthey do not affect the measured noise on the delay line 125. In anembodiment of the present invention, the number of the inverters 130 maybe a large number such as, for example, 100 inverters or 1000 inverters.

The delay line 125 may be utilized to modulate a known clock signal (theinput 110) with the power supply noise (power supply 104). The modulatedsignal (output 115) may then be transmitted off chip with very little orno signal loss, and may then be analyzed to measure the magnitude andspectrum of the power supply noise.

Verification of the noise generation may be achieved by turning on andoff other circuits on the same chip. When these other circuits areturned on and off dynamically, the modulation of the noise may beaffected. If the modulation of the noise is significantly altered whenother circuits are active, that may be an indication of occurrence ofcross coupling in the power supply 104, where there may be anothercomponent on the chip connected to the power supply 104 and affectingthe noise level on the power supply 104.

FIG. 2 illustrates a plot of an exemplary input and output of the powersupply noise measuring circuit, in accordance with an embodiment of thepresent invention. The input signal 210 may be, for example, a squarewave. A stable clock generator 140 may be utilized as the input signal210, which may be fed into an input port of the on-chip measuring module106 such as, for example, the input port 110 of FIG. 1 a. The outputport, such as, for example, output port 115, may then be observed forjitter and spurs. For example, when the input signal 210 is generated bya clock, the output signal 215 may be compared to the input signal 210to determine the amount of jitter caused by the noise generated by thepower supply.

The output signal 215 may comprise delayed versions of the input signal210, where the delays may be indicative of the characteristics of thenoise signal of the power supply. The output signal 215 may then becompared to the input signal 210, for example, using a jitter meter orby performing a fast Fourier transform (FFT) on the difference betweenthe two signals. This may be based on the assumption that any jitterintroduced to the output signal 215 as compared to the input signal 210may be caused by the voltage supply on the delay line 125. The magnitudeand spectrum of the jitter may be directly proportional to the magnitudeand spectrum of the power supply noise.

FIG. 3 illustrates an exemplary frequency representation of an outputsignal, in accordance with an embodiment of the present invention. Toanalyze the output signal as compared to the input signal, an instrumentsuch as, for example, a spectrum analyzer may be utilized. When lookingat the frequencies representing the output signal, the spike 310representing the input frequency corresponding to, for example, theinput signal 210, which in this example is a square wave, may have thelargest amplitude. In addition to the frequency representing the inputsignal 210, a group of frequencies 315 will also appear, with smalleramplitudes, representing side band signals generated as a result of thenoise signal. The distances between the frequency spike 310 representingthe input signal and the smaller side frequency spikes 315 representingthe power supply noise signal may represent the spectrum of the jitteron the power supply.

The noise on the power supply may be a pure tone at some frequency fN.In that case, the difference between the frequency spike 310 and thefirst harmonic, Af 320 may be equal to fN. For example, if there is a 10kHz pure tone on the power supply, then Af 320 will be 10 kHz. Ininstances where the noise on the power supply is random, the side bands315 are flat and may be used to estimate the magnitude of the noiserelative to the input, by examining the power of the output signal 310and the side bands 315. In instances where the input signal 210 is asine wave, an FFT of higher quality may result, since the harmonics ofthe sine wave may differ from the harmonics of a square wave.

FIG. 4 illustrates a block diagram of another exemplary power supplynoise measuring circuit, in accordance with an embodiment of the presentinvention. The power supply noise measuring circuit may comprise aninput port 410, an analog modulator 425, and an output port 415. Thecircuit may be also connected to a ground 420. The analog modulator 425may be connected to the power supply 104 of the on-chip power supply forwhich noise on its output is to be measured. The analog modulator 425may mix the power supply 104 (FIG. 1 a) with the input signal 410.

The analog modulator 425 may comprise a MUX 430, which may have as aninput a signal from the input port 410 and the power supply 104 viaanother input port 405. The output of the MUX 430 may yield the output415, which may comprise the noise from the power supply 104 modulated onthe input signal 410. The output 415 may then be analyzed to determinethe characteristic of the power supply noise.

In an embodiment of the present invention, there may be multiple powersupplies 104 integrated on the chip. In such an embodiment, each of thepower supplies 104 may be mixed with the input signal 410 using the MUX430. The outputs of all the MUXs 430 may then be multiplexed using ananalog MUX 435 and any one of the inputs to the MUX 435 may be selectedto generate the output 415. The output 415 may then have the inputsignal 410 modulated with the power supply noise of interest, and maythen be analyzed to determine the characteristics associated with thenoise signals of all the power supplies 104 on the chip. In anembodiment of the present invention, the output 415 may be mixed againwith the input signal 410, which demodulates the output signal, andthereby resulting in a signal that is just the noise of the power supply104.

FIG. 5 illustrates a plot of another exemplary input and output of thepower supply noise measuring circuit, in accordance with an embodimentof the present invention. The input signal 510 may be, for example, asinusoid wave, which may be fed into an input port of the measuringcircuit such as, for example, the input port 410 of FIG. 4. The outputport such as, for example, output port 415 may then be observed for themixed signal of the input signal and the noise signal of the powersupply 104. Mixing the input signal 510 with the power supply may resultin a signal that may be a signal of the input signal 510 modulated withthe noise signal of the power supply.

The output signal 515 may then be demodulated using the input signalitself, which may result in isolating the noise signal 520 of the powersupply. The noise signal 520 may then be analyzed by, for example, aspectrum analyzer to determine the characteristics associated with thenoise signal 520. Such characteristics may comprise, for example, themagnitude and frequency (or frequencies) associated with the noisesignal 520.

In one embodiment of the invention, an on-chip noise measurement systemthat measures noise associated with an on-chip power supply is provided.Referring to FIG. 1 a and FIG. 1 b, the on-chip noise measurement systemmay comprise an on-chip measurement module 106. The on-chip measurementmodule 106 may comprise a first input port 110, a second input port 105and an output port 115.

The first input port 110 may be coupled so that it receives an inputsignal and the second input port 105 may be coupled so that it receivesa power supply output signal that is generated by the on-chip powersupply 104. The on-chip measurement module 106 may comprise suitablecircuitry that is adapted to combine the input signal 110 and the powersupply output signal generated by the on-chip power supply 104. Theoutput port 115 may communicate an output signal representative of thecombined input signal and the power supply output signal out of theon-chip measurement module 106. The output signal generated from theon-chip measurement module 106 is indicative of the characteristics ofthe noise associated with the on-chip power supply 104.

The circuitry 106 may comprise a plurality of inverters 130 in series,wherein the input signal 110 may be input into the first of theplurality of inverters 130, and each of the plurality of inverters 130may be powered by the power supply 104. The input signal 110 maycomprise a square wave or other waveform. Using the inverters 130 maycause the output signal 115 to be a combination of delayed versions ofthe input signal. Utilizing spectrum analysis of the output signal 115may show the characteristics of the noise associated with the powersupply output signal. The characteristics of the noise associated withthe power supply may comprise a magnitude and phase of the noise in thefrequency domain.

The circuitry 106 may comprise at least one mixer that mixes the inputsignal 110 and the power supply 104. The input signal 110 may be, forexample, a sinusoidal signal and the output signal 115 may be thesinusoidal signal modulated with the noise associated with the powersupply. The noise associated with the power supply may then be retrievedby demodulating the output signal 115 with the input signal 110.

FIG. 6 illustrates a flow chart of an exemplary method of on-chip powersupply noise measurement, in accordance with an embodiment of thepresent invention. The noise measurement of FIG. 6 may be performed by asystem such as, for example, the system illustrated in FIG. 1 a and FIG.1 b. At 605 an input signal such as, for example, a square clock signalmay be received by an input port such as, for example, the input port110 of FIG. 1 a of the noise measurement module 106. At 610, a linedelay circuit such as, for example, the line delay 125, may delay theinput signal. The delay line 125 may be powered by the on-chip powersupply the noise of which the noise measurement module seeks to measure.The output may then be the input signal modulated with the power supplynoise and may be retrieved for analysis at 615. Analyzing the modulatedsignal may yield characteristics associated with the noise of the powersupply such as, for example, magnitude and frequency.

FIG. 7 illustrates a flow chart of another exemplary method of on-chippower supply noise measurement, in accordance with an embodiment of thepresent invention. The noise measurement of FIG. 7 may be performed by asystem such as, for example, the system illustrated in FIG. 1 a and FIG.4. At 705 an input signal such as, for example, a sinusoid, and a signalfrom the on-chip power supply may be received by an input port such as,for example, the input port 110 of FIG. 1 a of the noise measurementmodule 106. At 710, an analog modulator such as, for example, the analogmodulator 425 of FIG. 4 may be used to modulate the input signal and thesignal from the power supply. The output may then be the input signalmodulated with the power supply noise and may be retrieved for analysisat 715. At 720 the modulated output signal may be demodulated using thesinusoidal input signal, hence leaving for analysis the signalrepresenting the noise of the on-chip power supply. Analyzing themodulated signal may yield characteristics associated with the noise ofthe power supply such as, for example, magnitude and frequency.

In an embodiment of the present invention, there may be multiple powersupplies integrated on the chip. In such an embodiment, each of thepower supplies may be modulated with the input signal. All the modulatedsignals may then be multiplexed using an analog MUX 435 and any one ofthe modulated signals may be selected to generate an output. The outputmay then have the input signal modulated with the power supply noise ofinterest, and may then be analyzed to determine the characteristicsassociated with the noise signals of all the power supplies on the chip.In an embodiment of the present invention, the output may be demodulatedwith the input signal, and thereby resulting in a signal that is justthe noise of the power supply.

Accordingly, the present invention may be realized in hardware,software, or a combination thereof. The present invention may berealized in a centralized fashion in at least one computer system, or ina distributed fashion where different elements may be spread acrossseveral interconnected computer systems. Any kind of computer system orother apparatus adapted for carrying out the methods described hereinmay be suited. A typical combination of hardware and software may be ageneral-purpose computer system with a computer program that, when beingloaded and executed, may control the computer system such that itcarries out the methods described herein.

The present invention may also be embedded in a computer programproduct, which comprises all the features enabling the implementation ofthe methods described herein, and which when loaded in a computer systemis able to carry out these methods. Computer program in the presentcontext means any expression, in any language, code or notation, of aset of instructions intended to cause a system having an informationprocessing capability to perform a particular function either directlyor after either or both of the following: a) conversion to anotherlanguage, code or notation; b) reproduction in a different materialform.

While the present invention has been described with reference to certainembodiments, it will be understood by those skilled in the art thatvarious changes may be made and equivalents may be substituted withoutdeparting from the scope of the present invention. In addition, manymodifications may be made to adapt a particular situation or material tothe teachings of the present invention without departing from its scope.Therefore, it is intended that the present invention not be limited tothe particular embodiment disclosed, but that the present invention willinclude all embodiments falling within the scope of the appended claims.

1. An on-chip noise measurement system that measures noise associatedwith an on-chip power supply, the system comprising: an on-chipmeasurement module comprising: a first input port for receiving an inputsignal; a second input port that is coupled to the on-chip power supply;circuitry that combines the input signal and a power supply outputsignal generated by the on-chip power supply; and an output port thatcommunicates an output signal representative of the combined inputsignal and the power supply output signal, wherein the output signalindicates characteristics of the noise associated with the on-chip powersupply.
 2. The system according to claim 1 wherein the circuitrycomprises a plurality of inverters in series, wherein the input signalis input into the first of the plurality of inverters, and each of theplurality of inverters is powered by the power supply.
 3. The systemaccording to claim 2 wherein the input signal comprises a square wave.4. The system according to claim 2 wherein the output signal comprises acombination of delayed versions of the input signal.
 5. The systemaccording to claim 4 wherein spectrum analysis of the output signalindicates the characteristics of the noise associated with the powersupply output signal.
 6. The system according to claim 1 wherein thecharacteristics of the noise associated with the power supply comprise amagnitude and phase of the noise in the frequency domain.
 7. The systemaccording to claim 1 wherein the circuitry comprises at least one mixerthat mixes the input signal and the power supply.
 8. The systemaccording to claim 7 wherein the input signal comprises a sinusoidalsignal.
 9. The system according to claim 8 wherein the output signalcomprises the sinusoidal signal modulated with the noise associated withthe power supply.
 10. The system according to claim 9 wherein thecircuitry demodulates the output signal with the input signal yields thenoise associated with the power supply.
 11. A method for measuring noiseassociated with an on-chip power supply, the method comprising:receiving on chip, an input signal; combining on chip, the input signaland a power supply output signal generated by the on-chip power supply;and generating on chip, an output signal comprising the combined inputsignal and the power supply output signal, wherein the output signalindicates characteristics of the noise associated with the power supply.12. The method according to claim 11 wherein combining the input signaland the power supply output signal comprises running the input signalthrough a delay line powered by the power supply.
 13. The methodaccording to claim 12 wherein the delay line comprises a plurality ofinverters in series, wherein the input signal is input into the first ofthe plurality of inverters, and each of the plurality of inverters ispowered by the power supply.
 14. The method according to claim 12wherein the input signal comprises a square wave.
 15. The methodaccording to claim 12 wherein the output signal comprises a combinationof delayed versions of the input signal.
 16. The method according toclaim 15 further comprising analyzing the output signal to determine thecharacteristics of the noise associated with the power supply.
 17. Themethod according to claim 11 wherein the characteristics of the noiseassociated with the power supply comprise a magnitude and spectrum ofthe noise in the frequency domain.
 18. The method according to claim 11wherein combining the input signal and the power supply comprises mixingthe input signal and the power supply.
 19. The method according to claim18 wherein the input signal comprises a sinusoidal signal and the outputsignal comprises the sinusoidal signal modulated with the noiseassociated with the power supply.
 20. The method according to claim 19further comprising demodulating the output signal with the input signalto extract the noise associated with the power supply.
 21. An on-chipnoise measurement system that measures noise associated with an on-chippower supply, the system comprising: an on-chip measurement modulecomprising: a first input port and an output port; a second input portcoupled to the on-chip power supply; and combining circuitry coupled tothe first input port, the second input port, and the output port,wherein the combining circuitry comprises a plurality of seriallycoupled inverters that are coupled between the first input port and theoutput port and each of the each of the plurality of inverters iscoupled to the on-chip power supply and powered therefrom.